january 2013 doc id 023404 rev 1 1/9 AN4138 application note hsp061-2 / hsp062-2 high speed line protection on hdmi 1.4 link introduction this application note presents the hsp061-2 and hsp062-2 se ries and their capability to protect hdmi 1.3 and hdmi 1.4 tmds lines. the hdmi interface is used for transmitting di gital television audiovisual signals from dvd players, set-top- boxes and other sources to television sets and other video displays. the hsp series have been developed to be compliant with: hdmi version 1.4 standard knowin g the key point is the capab ility to transfer data with a maximum rate of 3.4 gbps per channel without distortion. this leads the hsp061-2 and hsp062-2 to have a large bandwidth, to pass fast voltage slopes and to contain the 100 ? line impedance, hsp061-2 and hsp062-2 are used on the tmds line. iec 61000-4-2 level 4 (8 kv contact discharge) hsp061-2 and hsp062-2 series are composed of several packages and topologies (see chapter 1 ) to better fit customer requirements in terms of pcb design. hsp061-2 has the ground pin in the middle of the package and is proposed in: sot-666: hsp061-2p6 qfn-6l: hsp061-2m6 qfn-4l: hsp061-2n4 hsp062-2 has the ground pin on the side of the package and is proposed in: sot-666: hsp062-2p6 qfn-6l: hsp062-2m6 all these devices are flow-through. www.st.com
hsp061-2 and hsp062-2 topology AN4138 2/9 doc id 023404 rev 1 1 hsp061-2 and hsp062-2 topology hsp061-2 series protects two high speed lines (see figure 1 ). this is a flow-through package to get an easy layout and to ensure the 100 ? differential impedance on hdmi ( figure 2 ). as pcb tracks are not cut, this offers th e possibility to test a board with or without protection depending on circuit portion to test. the device is rated v br min = 6 v @ 1 ma with a low typical leakage current of 0.1 na @ 25 c. for further information refer to the product datasheet for hsp061-2. hsp062-2 series uses the same technology as the hsp061-2.the only difference is location the ground pin as shown in figure 3 and figure 4 . for further information refer to the product datasheet for hsp062-2. figure 1. hsp061-2 topology figure 2. hsp061-2 footprint figure 3. hsp062-2 topology figure 4. hsp062-2 footprint hsp061-2m6 hsp061-2n4 hsp061-2p6 hsp061-2m6 hsp061-2n4 hsp061-2p6 via to gnd via to gnd via to gnd via to gnd via to gnd via to gnd hsp061-2m6 hsp061-2p6 hsp061-2m6 hsp061-2p6 via to gnd via to gnd
AN4138 characteristics related to hdmi 1.4 doc id 023404 rev 1 3/9 2 characteristics related to hdmi 1.4 protection bandwidth must be large enough to be transparent when a high bit rate is transferred on the line. the equation below give the relationship between lines, pixels, color depth and bit rate per channel: hdmi standard give a minimum rise time of 75 ps between 20% and 80%. considering a constant slope, this is equal to 100 ps between 10% and 90%. in order to be transparent, the esd protection must have a bandwidth in accordance with a rise time of 100 ps. usually, the relations between bandwidth and rise time is defined by the following formula: tr = 100 ps gives a bw = 3.2 ghz. figure 5 shows the cut-off frequency of the hsp061 -2n4 is 6 ghz which is high enough to correctly manage hdmi signals. figure 5. s21 attenuation measurement table 1. sample characteristics cea video code video format horizontal total pixel per line vertical total lines per frame frame rate (hz) color depth (bits) hdmi data rate (gbps) lane data rate (gbps) 16 1920 x 1080p 2200 1125 60 24 4.46 1.49 30 5.57 1.86 36 6.68 2.23 48 8.91 2.97 lane data rate = (h_total_pixels) (v_total_lines) ?? color_depth ? ? ? ? 3 (frame_rate) 10 8 bw = 1 / (pi tr) 300k 1m 3m 10m 30m 100m 300m 1g 3g -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 io1 io2 s21 (db) f (hz)
characteristics related to hdmi 1.4 AN4138 4/9 doc id 023404 rev 1 figure 6. differential impedance figure 6 shows the differential impedance measured with the ?time domain reflectometry? method. this method consists of sending a pulse with a short rise time (200 ps between 10% and 90% for hdmi) and to measure the reflected pulse. this gives the impedance of the line along the signal path. the hdmi standard requires 100 ? 15% differential impedance (between 85 ? and 115 ? ). as shown figure 6 , tdr measurement on hsp062-2 gives an impedance between 91 ? and 100 ? . these values are in accordance with the hdmi standard. the eye diagrams defined in the hdmi standard are related to bit rate of the signal and to location (source or sink). there are more constr aints on the source side, this is why we have chosen this one in the datasheet. the duration of the eye corresponds to a bit time. this diagram visualizes signal duration, synchronizati on, overshoot and capability of the signal to move from one state to another one. the key point for protection is to be sure there is no slow down effect. figure 7 shows the eye diagram for a 3.4 gbps signal. this measurement is done directly on the hsp061-2 to avoid pcb measurement effects. measurement shows a large safety margin between the eye pattern and the signal. figure 7. eye diagram- hdmi mask at 3.4gbps per channel (hsp061-2m6) 250 mv/div 49 ps/div 250 mv/div 49 ps/div
AN4138 characteristics related to hdmi 1.4 doc id 023404 rev 1 5/9 the goal of a protection device is to prot ect against parasitic disturbances. hdmi 1.4 standard specifies a 8 kv contact discharge requirement according to iec 61000-4-2. the test must be performed 5 times with 1 second between each shot. figure 8 shows the esd measurement when applied to hsp061-2m6. after a first short spike at around 55 v, the clamping voltage is limited at around 30 v at 30 ns instead of 8 kv. there is no ageing phenomenon and the protection remains efficient whatever the number of surges. it is important to keep in mind most of the integrated circuits are esd rated between 500 v and 2 kv (human body model) thanks to internal protection.it is important to note iec 61000-4-2 is much more severe than hbm, and for this reason it is mandatory to add an external protection. figure 8. iec 61000-4-2 response 10v/div 100ns/div
layout considerations AN4138 6/9 doc id 023404 rev 1 3 layout considerations 3.1 location for hsp device the esd projection is made by performance of the esd protection device, but also by the device placement and routing: a wrong placement, or a poor routing can completely cancel the performance of the esd device. the layout shown in figure 9 may produce parasitic inductanc es responsible for artificial overvoltages directly applied on the ic to be protected. a very simple calculation shows that for an 8 kv esd surge according to iec61000-4-2, the overvoltage due to parasitic inductances as shown in figure 10 may be really significant.with a peak current of 30 a reached in 0.8 ns and an parasitic pcb inductance of 5 nh (corresponds to metal track 5 mm long): then the overvoltage seen by the ic is: this parasitic inductance must be reduced as much as possible by shortening the ground path return to the gnd via. to avoid esd propagation on the pcb, the es d protection must be placed as close as possible to the esd source with the layout given in the datasheet. the layout given in the datasheet reduces parasitic inductance. it is important to connect the connector on one side of the hsp and the tr ansceiver on the other side. the gnd via on both sides must be used. as esd stress can be propagated on both sides of the cable, a protection device on each end of the cable is required. figure 9. non-optimized location figure 10. significant overvoltages due to non-optimal location via to gnd ic to protect via to gnd = via to gnd via to gnd fig 2 via to gnd ic to protect via to gnd v dt di l v ic esd surge is 8 kv with 1 ns rise time, this leads to 38 a/ns gnd layer di dt = 38 a/ns l di dt v = v + ic v = v + 190 v ic
AN4138 layout considerations doc id 023404 rev 1 7/9 figure 11. protection location on hdmi equipment pcb layout must be optimized to take advantage of all performances of the hsp products. for esd protection efficiency, the hsp products must be located as close as possible to the connector (see figure 11 ). this will avoid disturbance pr opagation to othe r components through the coupling effect. to avoid the inductance effect of pcb tracks, it is required to go directly from the connector to the hsp and then after to go to the hdmi circuit. vias to connect the ground pin of hsp to the ground plane must be as many as possibl e and placed as close as possible to the protection device to reduce parasitic inductance on the ground return path. vias to connect ground plane and the connector can be located on both sides of the connector. to be compliant with hdmi requirements, differential pairs must be designed with 100 ? differential impedance from the connector to the ic. the length of each line in the same differential pair must be equal to minimize intra pair skew. length of lines in different differential pair must also be as equal as far as possible to minimize inter pair skew. track width must be calculated depending on pcb ch aracteristics (relative permittivity, spacing, number of layers?). figure 12 shows an example of pcb layout with an hdmi type a smd connector. figure 12. layout for hdmi tmds type a connector (4x hsp061-2p6) wire plug board receptacle (connector) source device (i.e., dvd) tx protection cable assembly board receptacle (connector) sink device (display) rx protection hdmi type a connector 100x differential pairs as short as possible
conclusion AN4138 8/9 doc id 023404 rev 1 figure 13. layout for hdmi tmds type c connector (4x hsp062-2m6) figure 13 shows an example of pcb layout for an hdmi type c smd connector 4 conclusion two-lines hsp061-2 and hsp062-2 series complete the existing four- and eight-lines range to better fit customer requirements in terms of pcb design.their characteristics make them compatible with most of the high speed lines of the market (such as hdmi 1.4, ethernet, display port, usb3.0...). 5 revision history hdmi type c connector 100? differential pairs as short as possible table 2. document revision history date revision changes 11-jan-2013 1 initial release.
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